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LTC2424/LTC2428

APPLICATIONS INFORMATION

WUU

channel resistance of the multiplexer does not contribute

much to the error budget, as only input op amp current

flows through the switch. The LTC1050 was chosen for

its low input current and offset voltage, as well as its

ability to drive the input of a ∆Σ ADC.

Insert Gain or Buffering After the Multiplexer

Separate MUXOUT and ADCIN terminals permit insertion

of a gain stage between the MUX and the ADC. If passive

filtering is used at the input to the ADC, a buffer amplifier

is strongly recommended to avoid errors resulting from

the dynamic ADC input current. If antialiasing is required,

it should be placed at the input to the MUX. If bandwidth

limiting is required to improve noise performance, a filter

with a –3dB point at 1500Hz will reduce the effective total

noise bandwidth of the system to 15Hz. A roll-off at 1500Hz

eliminates all higher order images of the base bandwidth

of 6Hz. In Figure 35, the optional bandwidth-limit

ing filter

has a – 3dB point at 1450Hz. This filter can be inserted after

the multiplexer provided that higher source impedance

prior to the multiplexer does not reduce the –3dB fre-

quency, extending settling time, and resulting in charge

sharing between samples. The settling time of this filter to

20+ bits of accuracy is less than 2ms. In the presence of

external wideband noise, this filter reduces the apparent

noise by a factor of 5. Note that the noise bandwidth for

noise developed in the amplifier is 150Hz. In the example

shown, the gain of the amplifier is set to 40, the point at

which amplifier noise gain dominates the LTC2428 noise.

Input voltage range as shown is then 0V to 125mV DC. The

recommended capacitor at C2 for a gain of 40 would be

560pF.

Figure 35. Inserting Gain Between the Multiplexer and the ADC Input

24248 F35

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

–

8-CHANNEL

MUX

ANALOG

INPUTS

SET

GND

1, 6, 16, 18, 22, 27, 28

CSADC

CSMUX

SCK

CLK

SDO

LTC2428

ADCINMUXOUT

0.022µF

200k

OPTIONAL GAIN

AND ROLL-OFF

OPTIONAL

BANDWIDTH

LIMIT

5.1K

3 2, 8

10µF

SET

MAY BE REQUIRED BY OTHER

AMPLIFIERS (IS REQUIRED BY

BIPOLAR AMPLIFIERS)

5.1k

–

LTC1050

20-BIT

∆Σ ADC

1 2 ... 27 28 29 30 31 32 33 34 35 36

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AL Tech 8CH Manual de usuario Pagina 32

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